DocumentCode
3350367
Title
An experimental evaluation of partitioning algorithms
Author
Yeh, Ching-Wei ; Cheng, Chung-Kuan ; Lin, Ting-Ting Y.
Author_Institution
California Univ., San Diego, La Jolla, CA, USA
fYear
1991
fDate
23-27 Sep 1991
Lastpage
37987
Abstract
Presents an experimental evaluation of partitioning algorithms to supplement the work done by D.S. Johnson, et al. (1989). MCNC test-cases are used as part of the test beds. A two-level partitioning algorithm is proposed whose performance exceeds that of the algorithm by C.M. Fiduccia, R.M. Mattheyses (1982) on real circuitry by as much as 28%
Keywords
circuit layout CAD; simulated annealing; Kerrighan-Lin algorithms; MCNC test-cases; experimental evaluation; partitioning algorithms; real circuitry; simulated annealing; two-level partitioning algorithm; Benchmark testing; Circuit simulation; Circuit testing; Geometry; Joining processes; Macrocell networks; Partitioning algorithms; Signal design; Simulated annealing; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
ASIC Conference and Exhibit, 1991. Proceedings., Fourth Annual IEEE International
Conference_Location
Rochester, NY
Print_ISBN
0-7803-0101-3
Type
conf
DOI
10.1109/ASIC.1991.242898
Filename
242898
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