A multi-channel, 10ps resolution, FPGA-based TDC with 300MS/s throughput for open-source PET applications

This work presents a multi-channel time-to-digital converter (TDC) based on a field-programmable gate array (FPGA). This TDC shares many advantages of custom circuitry but few of the drawbacks. A thorough characterization of the TDC, based on a Xilinx Virtex-6 FPGA, is presented and several performance parameters are described, including distortions due to the FPGA architecture, temperature effects, intra-chip position variation, and chip-to-chip variation. An optimized TDC exhibits 10ps resolution, 3.86LSB integral non-linearity, and a throughput of 300MS/s. Also, measurements are shown for TDC-to-TDC distortion for multi-channel TDCs and simulations are performed to investigate parallelism using multiple TDCs. Results imply that FPGA-based TDCs can achieve high performance, and can be used in a wide range of applications requiring high throughput and accurate time measurements.