A C-Switch cell for low-voltage operation and high-density SRAMs

We propose a novel single-bit-line SRAM cell called a Complementary-Switch (C-Switch) cell. This cell features a C-Switch which combines an n-channel bulk transistor and a p-channel TFT in parallel. Through the use of a single-bit-line architecture with the C-Switch and a high performance TFT called Gate-All-around TFT (GAT), the proposed cell achieves both stable operation at 1.5 V and a size reduction of 16% when compared to conventional structures. Moreover, we have realized this cell using only a triple poly-Si and one metal process on a 0.3 /spl mu/m design rule.