Title :
A 14-bit, 200 MS/s digital-to-analog converter without trimming
Author :
Cheng, Kuo-Hsing ; Chen, Tsung-Shen ; Tu, Chia Ming
Author_Institution :
Dept. of Electr. Eng., National Central Univ., Taoyuan, Taiwan
Abstract :
In this paper, a 14-bit, low DNL, INL error, 20M sample/s, current-steering digital to analog converter (DAC) without trimming is proposed and analyzed. A feedback gain stage current mirror is proposed for improving the DAC´s differential non-linearity (DNL) and integral non-linearity (INL) characteristic. The post-layout simulation results show that both of the DNL and INL performance of this DAC are good. Moreover even considers Vt and β parameters mismatch, the DNL and INL are lower than ±0.5 least significant bit (LSB).
Keywords :
circuit feedback; circuit simulation; current mirrors; digital-analogue conversion; 14 bit; INL error; current mirror; current-steering DAC; differential nonlinearity; digital-to-analog converter; feedback gain stage; integral nonlinearity; least significant bit; low DNL DAC; parameters mismatch; post-layout simulation; Analog-digital conversion; Circuits; Digital-analog conversion; Electrical engineering; Equations; Impedance; MOSFETs; Mirrors; Negative feedback; Output feedback;
Conference_Titel :
Circuits and Systems, 2004. ISCAS '04. Proceedings of the 2004 International Symposium on
Print_ISBN :
0-7803-8251-X
DOI :
10.1109/ISCAS.2004.1328204
