Finite state machine testing based on growth and disappearance faults

An approach to generating functional test sequences. for synchronous sequential nonscan circuits is presented. The method is applicable when the functional description of the circuit can be obtained in the cubical form or a personality matrix. The faults are modeled as growth and disappearance faults in the cubical description of the irredundant combinational function of the finite state machine (FSM). Considering the combinational logic alone, test vectors for these faults are efficiently derived using a cube-based method developed for programmable logic arrays. Experimental results on MCNC synthesis benchmark FSMs and some ISCAS89 sequential circuits show that the approach can efficiently obtain functional test sequences which give very high coverage of stuck faults in specific implementations. The functional test sequences are implementation independent and can be obtained even when details of specific implementation are unavailable or unknown.<>