An analytical model for the slewing behavior of CMOS two-stage operational transconductance amplifiers

Author

Maghari, Nima ; Yavari, Mohammad ; Shoaei, Omid

Author_Institution

Dept. of ECE, Tehran Univ., Iran

Volume

1

fYear

2004

fDate

23-26 May 2004

Abstract

This paper presents a complete time-domain model for the slewing behavior of CMOS two-stage operational transconductance amplifiers (OTAs). In this model, the effects of both first and second stage currents are included. An analytical expression is given in terms of the compensation capacitance, load capacitance and device sizes for each positive and negative slew rates. HSPICE simulation results are provided to show the validity of the proposed models using a 0.35-μm CMOS technology. These models show near perfect agreement with simulation results.

Keywords

CMOS integrated circuits; SPICE; operational amplifiers; time-domain analysis; 0.35 micron; CMOS technology; CMOS two-stage operational transconductance amplifier; HSPICE simulation; compensation capacitance; first stage current; load capacitance; second stage current; slew rate; slewing behavior; time-domain model; Analytical models; CMOS technology; Capacitance; Integrated circuit modeling; Operational amplifiers; Semiconductor device modeling; Switched capacitor circuits; TV; Transconductance; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2004. ISCAS '04. Proceedings of the 2004 International Symposium on

Print_ISBN

0-7803-8251-X

Type

conf

DOI

10.1109/ISCAS.2004.1328254

Filename

1328254