DocumentCode
3356843
Title
Post-optimization design centering for RF integrated circuits
Author
Choi, Kiyong ; Allstot, David J.
Author_Institution
Dept. of Electr. Eng., Washington Univ., Seattle, WA, USA
Volume
1
fYear
2004
fDate
23-26 May 2004
Abstract
An adaptive simulated annealing algorithm for RF integrated circuit design and optimization reduces the number of iterations required to find acceptable solutions, and a tunneling technique increases the probability of escaping from local minima. A post-optimization design centering method identifies robust solutions including process, voltage and temperature variations, and is shown to be orders of magnitude more efficient than conventional Monte Carlo simulation approaches in identifying a robust design with high manufacturing yield.
Keywords
Monte Carlo methods; circuit optimisation; integrated circuit reliability; power amplifiers; radiofrequency integrated circuits; simulated annealing; Monte Carlo simulation; RF integrated circuits; circuit optimization; design centering; integrated circuit design; integrated circuit reliability; manufacturing yield; post-optimization design; power amplifiers; simulated annealing algorithm; temperature variations; tunnelling technique; Circuit simulation; Design methodology; Design optimization; Integrated circuit synthesis; Radio frequency; Radiofrequency identification; Radiofrequency integrated circuits; Robustness; Simulated annealing; Tunneling;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2004. ISCAS '04. Proceedings of the 2004 International Symposium on
Print_ISBN
0-7803-8251-X
Type
conf
DOI
10.1109/ISCAS.2004.1328355
Filename
1328355
Link To Document