DocumentCode
3358843
Title
Dynamic hardware multiplexing: improving adaptability with a run time reconfiguration manager
Author
Benoit, P. ; Torres, L. ; Sassatelli, G. ; Robert, M. ; Cambon, G. ; Becker, J.
Author_Institution
LIRMM, Montpellier Univ.
fYear
2006
fDate
2-3 March 2006
Abstract
Dynamic reconfiguration provides interesting features offering hardware flexibility and adaptability. Unfortunately, the lack of programming tools to manage it has limited its use in current SoCs. This paper presents a method to abstract, at design-time, dynamic reconfiguration management. Dynamic hardware multiplexing is a generic principle based on a scheduler dedicated to reconfigurable resources management at run-time. Formal background, implementation, simulation results and validations are exposed to illustrate the contribution of this study
Keywords
processor scheduling; reconfigurable architectures; system-on-chip; dynamic hardware multiplexing; dynamic reconfiguration management; reconfigurable resources management; reconfiguration manager; Dynamic scheduling; Field programmable gate arrays; Hardware; Job shop scheduling; Processor scheduling; Reconfigurable architectures; Reconfigurable logic; Resource management; Runtime; Scheduling algorithm;
fLanguage
English
Publisher
ieee
Conference_Titel
Emerging VLSI Technologies and Architectures, 2006. IEEE Computer Society Annual Symposium on
Conference_Location
Karlsruhe
Print_ISBN
0-7695-2533-4
Type
conf
DOI
10.1109/ISVLSI.2006.38
Filename
1602448
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