An FPGA-based distributed IP watermarking method

An FPGA (Field Programmable Gate Array) based distributed IP (Intellectual Property) watermarking method is presented for reusable IP protection. The signature is encrypted by the hash algorithm MD5, generating 128 bits digital digest. The digest is then transformed into watermark positions and watermark bits with high security. The watermark bits is finally embedded into the LUTs(Lookup Table) of FPGA design by identical logic configuration. The normal function of original design will not change and the actual embedded watermark is reduced drastically due to the transformation. The experimental results on Xilinx Virtex II Pro XC2VP4 FPGA show low resource and timing overhead and high security by comparing with other method.