DocumentCode
3360740
Title
20 GHz low power QVCO and De-skew techniques in 0.13μm digital CMOS
Author
Hossain, Masum ; Carusone, Anthony Chan
Author_Institution
Dept. of Electr. & Comput. Eng., Univ. of Toronto, Toronto, ONT
fYear
2008
fDate
21-24 Sept. 2008
Firstpage
447
Lastpage
450
Abstract
A novel VCO topology is proposed that combines the low power of -gm oscillators with the inherent buffering of Colpitts oscillators. Using this topology, a quadrature VCO (QVCO) was implemented in 0.13 mum digital CMOS consuming 32 mW at 20 GHz with just over 10% tuning range. The measured phase noise of the QVCO at 20.17 GHz is -102.41 dBc/Hz at 1 MHz offset. Because the load is isolated from the tank, the QVCO can directly drive 50-Ohm impedances or large capacitive loads with no additional buffering. A technique to use the QVCO to deskew clocks is also presented whereby the QVCO accepts a small forwarded clock amplitude of 20 mV, and provides a 200 mV peak-to-peak differential clock output with linear control of the phase over the complete range, 0-360deg.
Keywords
CMOS digital integrated circuits; MMIC oscillators; clocks; low-power electronics; phase noise; voltage-controlled oscillators; CMOS digital integrated circuits; Colpitts oscillators; clock deskew; frequency 20 GHz to 20.17 GHz; linear control; phase noise; power 32 mW; quadrature voltage-controlled oscillators; size 0.13 mum; CMOS digital integrated circuits; CMOS process; Capacitance; Circuit topology; Clocks; Energy consumption; Frequency; Inductance; Transconductance; Voltage-controlled oscillators;
fLanguage
English
Publisher
ieee
Conference_Titel
Custom Integrated Circuits Conference, 2008. CICC 2008. IEEE
Conference_Location
San Jose, CA
Print_ISBN
978-1-4244-2018-6
Electronic_ISBN
978-1-4244-2019-3
Type
conf
DOI
10.1109/CICC.2008.4672117
Filename
4672117
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