Simulations and measurements of cross-talk phenomena in BiCMOS technology for hard disk drives

Author

de Cremoux, G. ; Dubois, E. ; Bardy, S. ; Lebailly, J.

Author_Institution

CNRS, Villeneuve d´Ascq, France

fYear

1996

fDate

8-11 Dec. 1996

Firstpage

481

Lastpage

484

Abstract

This paper proposes a detailed comparison between three guard ring architectures designed in a BiCMOS process to minimize substrate cross-talk currents injected by a power vertical DMOS switch. The proposed structures consist of isolator and collector regions placed into a p-epi layer at different locations between the power device and the surrounding CMOS structures. Results show that collector guard ring efficiency is improved using a deep and large n-type implanted region preferably located close to the device to protect.

Keywords

BiCMOS integrated circuits; circuit analysis computing; circuit optimisation; crosstalk; hard discs; integrated circuit design; integrated circuit measurement; ion implantation; isolation technology; power integrated circuits; 2D simulations; BiCMOS technology; collector guard ring efficiency; collector regions; commutation circuit; cross-talk isolation efficiency; deep n-type implanted region; guard ring architectures; hard disk drives; isolator regions; p-epi layer; perturbation current reduction; power vertical DMOS switch; substrate cross-talk currents; surrounding CMOS structures; BiCMOS integrated circuits; Current measurement; Hard disks; Isolators; Monolithic integrated circuits; Power measurement; Power semiconductor switches; Protection; Substrates; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 1996. IEDM '96., International

Conference_Location

San Francisco, CA, USA

ISSN

0163-1918

Print_ISBN

0-7803-3393-4

Type

conf

DOI

10.1109/IEDM.1996.553631

Filename

553631