Title :
High-Speed I/O Tests in High-Volume Manufacturing
Author_Institution :
Teradyne, Inc., 1321 Ridder Park Dr., San Jose, CA 95131. brian.swing@teradyne.com
Abstract :
As high speed IO buses increase in number on emerging devices, new test challenges will drive changes in tester configuration and performance. HVM Tester pin capabilities will shift away from pure digital test to include coverage for high speed functional, AC characterization, and performance based tests. Production test economics will challenge these solutions to be provided at low cost with test time efficiency for large pin count configurations.
Keywords :
Clocks; Costs; Frequency measurement; Jitter; Manufacturing; Phase measurement; Production; Testing; Time measurement; Transmitters;
Conference_Titel :
Test Conference, 2006. ITC '06. IEEE International
Conference_Location :
Santa Clara, CA, USA
Print_ISBN :
1-4244-0292-1
Electronic_ISBN :
1089-3539
DOI :
10.1109/TEST.2006.297764
