DocumentCode :
3364453
Title :
High-speed, Low Cost Parallel Memory-Based FFT Processors for OFDM Applications
Author :
Wey, Chin-Long ; Lin, Shin-Yo ; Tang, Wei-Chien ; Shiue, Muh-Tien
Author_Institution :
Nat. Central Univ., Jhongli
fYear :
2007
fDate :
11-14 Dec. 2007
Firstpage :
783
Lastpage :
787
Abstract :
Low cost yet efficient FFT (Fast Fourier Transform) processors are greatly needed for real-time operation in many OFDM applications. Taking the advantages of both memory-based and pipelined FFT architectures, this paper presents simple radix-2 memory-based FFT (MBFFT) Processors with low hardware cost and high maximum operation frequency. Results show that the core area of the proposed MBFFT is 1.79mm2 with the maximum operation frequency of 205MHz, or a process speed of 269¿s for N=8192 points (24 bits per word). This also implies a throughput of 730 Mb/s (Mbits per second). This paper also presents parallel MBFFT structures with two and four butterfly processing elements (PEs), respectively, to improve the latency while still keeping low hardware cost and high maximum operation frequency.
Keywords :
OFDM modulation; fast Fourier transforms; OFDM applications; butterfly processing elements; fast Fourier transforms; maximum operation frequency; parallel memory-based FFT processors; real-time operation; Circuits; Costs; Delay; Digital video broadcasting; Fast Fourier transforms; Feedback; Hardware; Memory architecture; OFDM; Throughput; Fast Fourier Transform (FFT); Orthogonal Frequency Division Multiplexing (OFDM); memory-based FFT; multi-path delay commutator (MDC) FFT; single-path delay feedback (SDF) FFT;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics, Circuits and Systems, 2007. ICECS 2007. 14th IEEE International Conference on
Conference_Location :
Marrakech
Print_ISBN :
978-1-4244-1377-5
Electronic_ISBN :
978-1-4244-1378-2
Type :
conf
DOI :
10.1109/ICECS.2007.4511108
Filename :
4511108
Link To Document :
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