Cluster-Based Hybrid Reconfigurable Architecture for Auto-adaptive SoC

The paper presents a cluster-based hybrid reconfigurable architecture for auto-adaptive Soc to achieve high-performance and flexibility with low design effort on a variety of multimedia applications. An efficient adaptivity is enabled thanks to the use of heterogenous and exchangeable cores and to a hierarchical organization. This organization is materialized trough a global hardware reconfiguration and local hardware reconfiguration by using partial and dynamic reconfiguration. A case study of a discrete wavelet transform is used to demonstrate the feasibility in task adaptive level considering different types of filters. A platform based on a Xilinx Virtex-4 FPGA is used for experimental implementation.