Title :
Low power real time electronic neuron VLSI design using subthreshold technique
Author :
Lee, Young Jun ; Lee, Jihyun ; Kim, Y.B. ; Ayers, J. ; Volkovskii, A. ; Selverston, A. ; Abarbanel, H. ; Rabinovich, M.
Author_Institution :
California Univ., San Diego, La Jolla, CA, USA
Abstract :
We discuss a VLSI electronic neuron circuit that implements the Hindmarsh and Rose neuron model. Magnitude and time scaling techniques are employed for a 2 V power supply operation. A subthreshold operation technique and a single MOS resistor are used to minimize area and power consumption. Output bursts of the electronic neuron can be modulated dynamically by varying the input voltage level. The circuit is designed using a 0.25 μm CMOS standard process, and the total power dissipation is 163.4 μwatt.
Keywords :
CMOS integrated circuits; VLSI; integrated circuit design; integrated circuit modelling; neural nets; operational amplifiers; 0.25 micron; 163.4 muW; 2 V; CMOS standard process; Hindmarsh neuron model; Rose neuron model; input voltage level; low power real time electronic neuron VLSI design; power consumption; power dissipation; single MOS resistor; subthreshold operation technique; Biological control systems; Biological system modeling; Circuits; Energy consumption; Equations; Hardware; Neurons; Power supplies; Very large scale integration; Voltage;
Conference_Titel :
Circuits and Systems, 2004. ISCAS '04. Proceedings of the 2004 International Symposium on
Print_ISBN :
0-7803-8251-X
DOI :
10.1109/ISCAS.2004.1329111
