Signal Integrity Analysis of a High Precision D/A Converter

The purpose of this paper is to investigate the significance of different coupling mechanisms that occur in a high precision D/A converter. The standard Integrated Circuit Emission Model approach is applied to an existing D/A converter built in TSMC CMOS 0.25 ¿m technology. Aggressors, propagation media and victims are defined and modelled using classical CAD tools. Potential noise sources and victims are identified and some frequency and time domain simulation results reveal the noise source signatures. This study highlights the main noise source in such kind of converters: the charging/ischarging switch current that occur at each sampling period. Based on detailed simulations, the 60mV peak to peak voltage glitch observed on the output is explained by power and ground ringing due to current switches, whereas previous studies suggested that such glitches were due to substrate coupling. The simulated substrate propagated digital glitches have a peak to peak voltage of 5mV, and are more than ten times lower than glitches induced by the current switch activities.