Architecture design of reconfigurable reed-solomon error correction codec

This paper presents the architecture design of the reconfigurable Reed Solomon (RS) error correction codec that supports ten RS codes for any system which use the RS codes. The proposed design based on the reconfigurable architecture and accommodated with different code parameters. After entering a special set of RS parameters, the re-planning controller changes the data path to perform the corresponding RS coding and decoding. The proposed design can be applied to different applications of the data storage and the communication system.