• DocumentCode
    3369159
  • Title

    Recent research development in flip-chip routing

  • Author

    Hsu-Chieh Lee ; Yao-Wen Chang ; Lee, Po-Wei

  • Author_Institution
    Grad. Inst. of Electron. Eng., Nat. Taiwan Univ., Taipei, Taiwan
  • fYear
    2010
  • fDate
    7-11 Nov. 2010
  • Firstpage
    404
  • Lastpage
    410
  • Abstract
    The flip-chip package is introduced for modern IC designs with higher integration density, larger I/O counts, faster speed, better signal integrity, etc. To ease design changes, an extra metal layer is introduced to redistribute nets between wire-bonding (I/O) pads in a die and bump pads in a package carrier. Flipchip routing is performed by redistributing and interconnecting nets between the I/O and bump pads. As the design complexity grows, routing has played a pivotal role in flip-chip design. In this paper, we first introduce popular flip-chip structures, their routing-region modeling, and induced routing problems, survey key published techniques for flip-chip routing with respect to specific structures and pad assignment methods, and provide some future research directions for the modern flip-chip routing problem.
  • Keywords
    flip-chip devices; integrated circuit design; integrated circuit interconnections; lead bonding; research and development; I/O counts; bump pad; die pad; flip-chip package; flip-chip routing; integrated circuit designs; integration density; interconnecting nets; redistributing nets; research development; signal integrity; wire bonding pads; Arrays; Integrated circuits; Joining processes; Metals; Routing; Tiles; Topology;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer-Aided Design (ICCAD), 2010 IEEE/ACM International Conference on
  • Conference_Location
    San Jose, CA
  • ISSN
    1092-3152
  • Print_ISBN
    978-1-4244-8193-4
  • Type

    conf

  • DOI
    10.1109/ICCAD.2010.5653698
  • Filename
    5653698