DocumentCode :
3369250
Title :
Sensitivity analysis of ramp response of VLSI interconnects.
Author :
Ligocka, Agnieszka ; Bandurski, Wojciech
Author_Institution :
Multimedia Telecommun. & Microelectron., Poznan Univ. of Technol., Poznan
fYear :
2008
fDate :
14-17 Sept. 2008
Firstpage :
537
Lastpage :
540
Abstract :
The paper presents the sensitivity analysis of closed form formula for step response of on-chip VLSI interconnect. The formula is calculated with multiple scales method the sensitivity of the method is analyzed and compared with the sensitivity of simulation of the interconnect in SPICE program.
Keywords :
VLSI; integrated circuit interconnections; sensitivity analysis; step response; system-on-chip; closed form formula; multiple scales; on-chip VLSI interconnect; ramp response; sensitivity analysis; step response; Analytical models; Clocks; Differential equations; Inductance; Perturbation methods; SPICE; Sensitivity analysis; Transmission lines; Very large scale integration; Wires;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Signals and Electronic Systems, 2008. ICSES '08. International Conference on
Conference_Location :
Krakow
Print_ISBN :
978-83-88309-47-2
Electronic_ISBN :
978-83-88309-52-6
Type :
conf
DOI :
10.1109/ICSES.2008.4673491
Filename :
4673491
Link To Document :
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