DocumentCode
3370093
Title
Assertion-based on-line verification and debug environment for complex hardware systems
Author
Peterson, K. ; Savaria, Y.
Author_Institution
Dept. of Electr. & Comput. Eng., Ecole Polytech. de Montreal, Que., Canada
Volume
2
fYear
2004
fDate
23-26 May 2004
Abstract
This paper describes a debug environment for high performance integrated circuits and systems, running in real-world conditions. With the proposed environment, debug data is collected by a built-in debug hardware module (or integrated probe) and transferred to an external debugger using a dedicated debug port. The external debugger, composed of a FPGA and a processor, uses real-time assertion-based verification techniques to ensure that the system acts according to its specifications. Dynamic changes in the probe configuration allow higher monitoring resolution of critical parts of the circuit or system and improve the use of the debug port bandwidth. This paper discusses advantages and limitations of this technique.
Keywords
computer debugging; field programmable gate arrays; formal verification; high-speed integrated circuits; integrated circuit testing; large-scale systems; system-on-chip; FPGA; assertion based online verification; built in debug hardware module; complex hardware systems; debug data collection; debug environment; dedicated debug port; external debugger; high speed integrated circuits; integrated circuits; integrated systems; probe configuration; system-on-chip; Bandwidth; Circuits; Filtering; Frequency; Hardware; Instruments; Monitoring; Probes; Standards development; System-on-a-chip;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2004. ISCAS '04. Proceedings of the 2004 International Symposium on
Print_ISBN
0-7803-8251-X
Type
conf
DOI
10.1109/ISCAS.2004.1329364
Filename
1329364
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