A low-power DCT IP core based on 2D algebraic integer encoding

Author

Fu, Minyi ; Jullien, G.A. ; Dimitrov, V.S. ; Ahmadi, M.

Author_Institution

RCIM Res. Centre, Windsor Univ., Ont., Canada

Volume

2

fYear

2004

fDate

23-26 May 2004

Abstract

This paper discusses the application of a new two dimensional algebraic integer encoding scheme for the design of a DCT processor core for JPEG and MPEG applications. The paper concentrates on the efficient implementation of a 2D algebraic integer encoding procedure. The processor takes advantage of the low complexity, multiplierless, high-precision nature of the algebraic integer encoding scheme to achieve low power consumption. Test results from a proof-of-concept 0.18 μm CMOS 8×8 DCT chip demonstrate a low power dissipation of 7.5 mW at 75 MHz.

Keywords

CMOS integrated circuits; algebraic codes; discrete cosine transforms; industrial property; integrated circuit design; low-power electronics; microprocessor chips; video coding; 0.18 micron; 7.5 mW; 75 MHz; CMOS integrated circuit; DCT processor design; JPEG applications; MPEG applications; integrated circuit design; low power DCT IP core; low power consumption; low power dissipation; two dimensional algebraic integer encoding; Discrete cosine transforms; Encoding; Energy consumption; Equations; Hardware; Personal digital assistants; Polynomials; Testing; Transform coding; Video compression;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2004. ISCAS '04. Proceedings of the 2004 International Symposium on

Print_ISBN

0-7803-8251-X

Type

conf

DOI

10.1109/ISCAS.2004.1329384

Filename

1329384