DocumentCode
3370764
Title
Design of PS2 keyboard controller IP core based on SOPC
Author
Sujuan Li ; Fei Xiang ; Juwei Zhang
Author_Institution
Electron. & Inf. Eng. Coll., Henan Univ. of Sci. & Technol., Luoyang, China
Volume
8
fYear
2011
fDate
12-14 Aug. 2011
Firstpage
4114
Lastpage
4117
Abstract
In this paper, the IP core is designed with ALT ERA NIOSII soft-core processors as the core and Cyclone II FPGA series as the digital platform, the SOPC technology is used to make the I/O interface controller soft-core such as microprocessors and PS2 keyboard on a chip of FPGA. NIOSII IDE is used to accomplish the software testing of system and the hardware test is completed by ALTERA Cyclone II EP2C35 FPGA chip experimental platform. The result shows that the functions of this IP core are correct, furthermore it can be reused conveniently in the SOPC system.
Keywords
field programmable gate arrays; industrial property; keyboards; microprocessor chips; multiprocessing systems; peripheral interfaces; program testing; system-on-chip; ALTERA Cyclone II EP2C35 FPGA chip; ALTERA NIOSII soft-core processors; I-O interface controller soft-core; NIOSII IDE; PS2 keyboard controller IP core; SOPC technology; digital platform; microprocessors; software testing; Clocks; Field programmable gate arrays; IP networks; Keyboards; Protocols; Software; Synchronization; Intellectual Property core; Nios II; PS2 protocol; System on a programmable chip;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronic and Mechanical Engineering and Information Technology (EMEIT), 2011 International Conference on
Conference_Location
Harbin, Heilongjiang
Print_ISBN
978-1-61284-087-1
Type
conf
DOI
10.1109/EMEIT.2011.6023957
Filename
6023957
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