DocumentCode :
3371479
Title :
On timing-independent false path identification
Author :
Yuan, Feng ; Xu, Qiang
Author_Institution :
Dept. of Comput. Sci. & Eng., Chinese Univ. of Hong Kong, Hong Kong, China
fYear :
2010
fDate :
7-11 Nov. 2010
Firstpage :
532
Lastpage :
535
Abstract :
This paper is concerned with finding timing-independent false paths that cannot be sensitized under any signal arrival time condition in integrated circuits. Existing techniques regard a path as a true path as long as a vector pair can be found to sensitize it. This is rather pessimistic since such a path might be activated only with illegal states in the circuit and hence it is actually functionally-unsensitizable. In this paper, we develop novel techniques to take the above issue into consideration when identifying false paths, which facilitates us to find much more false paths than conventional techniques. Experimental results on benchmark circuits demonstrate the effectiveness of the proposed methodology.
Keywords :
integrated circuit testing; logic testing; network routing; integrated circuits; signal arrival time; timing independent false path identification; Automatic test pattern generation; Benchmark testing; Delay; Logic gates; Phantoms; Table lookup;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer-Aided Design (ICCAD), 2010 IEEE/ACM International Conference on
Conference_Location :
San Jose, CA
ISSN :
1092-3152
Print_ISBN :
978-1-4244-8193-4
Type :
conf
DOI :
10.1109/ICCAD.2010.5653847
Filename :
5653847
Link To Document :
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