DocumentCode
3371932
Title
FPGA based on integration of memristors and CMOS devices
Author
Wang, Wei ; Jing, Tom T. ; Butcher, Brian
Author_Institution
Coll. of Nanoscale Sci. & Eng., SUNY - Univ. at Albany, Albany, NY, USA
fYear
2010
fDate
May 30 2010-June 2 2010
Firstpage
1963
Lastpage
1966
Abstract
This paper introduces a novel CMOS-memristor hybrid reconfigurable architecture, mFPGA. Different from the existing crossbar-based CMOS-memristor architectures, mFPGA mainly consists of lTlM-like structures that can be fabricated by using a CMOS-compatible process. These devices can efficiently establish FPGA block memories. More importantly, novel CMOS-memristor routing switches are developed to replace the CMOS routing switches to achieve significant density enhancement and power reduction. The simulation results demonstrate that 2D and 3D mFPGAs provide at least a 2X to 3X overall improvement in terms of area reduction, and a 20% lower power consumption, compared with corresponding CMOS FPGA architectures.
Keywords
CMOS memory circuits; field programmable gate arrays; low-power electronics; memristors; nanoelectronics; network routing; switches; CMOS devices; CMOS memristor routing switch; CMOS-memristor hybrid reconfigurable architecture; FPGA block memory; lower power consumption; mFPGA; memristors; Buildings; CMOS logic circuits; Circuit simulation; Energy consumption; Field programmable gate arrays; Memristors; Nanoscale devices; Reconfigurable architectures; Routing; Switches;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems (ISCAS), Proceedings of 2010 IEEE International Symposium on
Conference_Location
Paris
Print_ISBN
978-1-4244-5308-5
Electronic_ISBN
978-1-4244-5309-2
Type
conf
DOI
10.1109/ISCAS.2010.5537010
Filename
5537010
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