Fast time-domain symbolic simulation for synthesis of sigma-delta analog-digital converters

This work presents a fast time-domain simulation method for automated synthesis of Σ-Δ ADC. At the system-level, the method uses a symbolic description of the ADC netlist. Building blocks in the netlist are macromodels, which include circuit non-idealities and nonlinear behaviour. As compared to existing simulation methods for Σ-Δ ADC, this technique is fully automated and uses more complex circuit macromodels.