• DocumentCode
    3372245
  • Title

    Design of high-speed sampling circuits

  • Author

    Hao Lu ; Zhenzhan Wang ; Guoxing Gao

  • Author_Institution
    Center for Space Sci. & Appl. Res., Grad. Univ. of Chinese Acad. of Sci., Beijing, China
  • Volume
    9
  • fYear
    2011
  • fDate
    12-14 Aug. 2011
  • Firstpage
    4516
  • Lastpage
    4519
  • Abstract
    As high-speed signal sampling is not easy to achieve and sampled high-speed data is not easy to accept or control, two methods of high-speed sampling clock generation and clock distribution are given relating to practical application. Two ways of high-speed data deceleration are introduced, namely the hardware multiplexer transition method and the software programming control method by large scale integrated circuit. The sampling circuit can handle the data at the highest sampling rate of 3GHz. The systems have the quality of high integration, low power consumption, simple structure and excellent performance. All the programs have been proven feasible and achieving good results.
  • Keywords
    analogue-digital conversion; large scale integration; low-power electronics; multiplexing equipment; signal processing equipment; frequency 3 GHz; hardware multiplexer transition method; high-speed data deceleration; high-speed sampling circuits; high-speed signal sampling; large scale integrated circuit; low power consumption; software programming control method; Clocks; Field programmable gate arrays; Hardware; Jitter; Phase locked loops; Software; Synchronization; DEMUX; FPGA; clock distribution; high-speed ADC;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronic and Mechanical Engineering and Information Technology (EMEIT), 2011 International Conference on
  • Conference_Location
    Harbin, Heilongjiang
  • Print_ISBN
    978-1-61284-087-1
  • Type

    conf

  • DOI
    10.1109/EMEIT.2011.6024033
  • Filename
    6024033