Energy capability of lateral and vertical DMOS transistors in an advanced automotive smart power technology

Author

Merchant, S. ; Baird, R. ; Bennett, P. ; Percy, P. ; Dupuy, P. ; Rossel, P.

Author_Institution

Motorola Inc., Mesa, AZ, USA

fYear

1998

fDate

3-6 Jun 1998

Firstpage

317

Lastpage

320

Abstract

Thermal failure of 65 V-rated SMARTMOS power devices is analyzed. Failure time measurements in the 1 ms range correlate with a 3D analytical model. The failure mechanism is shown to be purely thermal, not electrical. The RESURF (reduced surface voltage) LDMOS and updrain TMOS devices have equal energy capability per unit area. The low specific on-resistance of the LDMOS (1.6 mΩ-cm²) gives it a significant advantage over the updrain TMOS (2.3 mΩ-cm²) for many automotive applications

Keywords

BIMOS integrated circuits; MOSFET; automotive electronics; electric resistance; failure analysis; integrated circuit measurement; integrated circuit modelling; integrated circuit reliability; power integrated circuits; thermal analysis; 3D analytical model; 65 V; BCDMOS IC; RESURF LDMOS devices; SMARTMOS power devices; TMOS devices; automotive applications; automotive smart power technology; energy capability; failure mechanism; failure time measurements; lateral DMOS transistors; reduced surface voltage LDMOS devices; specific on-resistance; thermal failure; vertical DMOS transistors; Automotive applications; Automotive engineering; Fuels; Integrated circuit modeling; Pulse shaping methods; Temperature; Thermal conductivity; Time measurement; Transistors; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Power Semiconductor Devices and ICs, 1998. ISPSD 98. Proceedings of the 10th International Symposium on

Conference_Location

Kyoto

ISSN

1063-6854

Print_ISBN

0-7803-4752-8

Type

conf

DOI

10.1109/ISPSD.1998.702697

Filename

702697