Title :
Event-based 64-channel binaural silicon cochlea with Q enhancement mechanisms
Author :
Liu, Shih-Chii ; Van Schaik, André ; Minch, Bradley A. ; Delbruck, Tobi
Author_Institution :
Univ. of Zurich, Zurich, Switzerland
fDate :
May 30 2010-June 2 2010
Abstract :
This paper describes an event-based binaural silicon cochlea aimed at spatial audition and auditory scene analysis. The chip has a matched pair of 64-stage cascaded analog second-order filter banks with 512 pulse-frequency modulated (PFM) address-event representation (AER) outputs. The spectral selectivity is sharpened through 2 different on-chip methods: an on-chip local Q DAC and an on-chip spatial sharpening through nearest neighbour lateral inhibition. The fabricated chip in a 4-metal 2-poly 0.35um CMOS process consumes peak 25mW power for the digital circuits and 33mW for the analog core. Dynamic range to produce PFM output is 36dB (25mVpp to 1500mVpp at microphone preamp output). Event timing jitter is 2us for 250mVpp input. The peak output bandwidth is 10M events per second (eps) but typical speech scenarios show rates of 20keps.
Keywords :
CMOS integrated circuits; digital-analogue conversion; ear; pulse frequency modulation; timing jitter; CMOS process; PFM; address event representation; analog second order filter bank; auditory scene analysis; event based binaural silicon cochlea; on-chip local Q DAC; on-chip spatial sharpening; power 25 mW; power 33 mW; pulse frequency modulation; size 0.35 mum; spatial audition; time 2 mus; timing jitter; voltage 250 mV; Bandwidth; CMOS process; Digital circuits; Dynamic range; Filter bank; Image analysis; Microphones; Pulse modulation; Silicon; Timing jitter; AER; audition; neuromorphic; spike-based;
Conference_Titel :
Circuits and Systems (ISCAS), Proceedings of 2010 IEEE International Symposium on
Conference_Location :
Paris
Print_ISBN :
978-1-4244-5308-5
Electronic_ISBN :
978-1-4244-5309-2
DOI :
10.1109/ISCAS.2010.5537164
