A high-gain, low-noise CMOS amplifier for sampled bio-potential recording

There is a growing demand for low-noise, small-size and programmable biopotential acquisition systems. A crucial circuit block is the high-gain amplifier which also constitutes the interface to the patient. We propose a low-power and low-noise front-end with configurable gain for recording of signals such as the electroneurogram (ENG) or electromyogram (EMG). The proposed circuit consists of an input stage using lateral bipolar transistors realized in CMOS technology for optimum noise performance followed by a switched-capacitor transresistance stage. Simulated and measured results for a chip fabricated in 0.35μm CMOS technology are reported. The circuit occupies an area of 0.064 mm², yields a nominal gain of 756 V/V, 13 nV/√Hz input noise and a common-mode rejection of over 97 dB.