cFPGA: CNT emerging memory-based FPGA

This paper develops a novel reconfigurable architecture, CMOS-nanorelay FPGA (cFPGA) by integrating carbon nanorelays with CMOS devices to function as FPGA components. cFPGA is a highly efficient architecture, providing 2X density and standby power improvement along with a 30% dynamic power reduction as compared with solely CMOS FPGA circuits. This performance improvement is achieved by using 2T1N structures as routing switches: Two CMOS transistors (2T): one for programming purposes, the other for signal transmission; and one nanorelay (1N) as the switching element. These 2T1N structures do not have nanorelays in the signal path, thereby eliminating its large quantum resistance. This is a significant improvement over the conventional CMOS-nanorelay hybrid FPGA circuits. The proposed cFPGA is implemented by using vertical carbon nanotubes that are relatively easier to fabricate as compared with horizontal nanotubes.