Title :
Partial scan: what problem does it solve?
Author :
Bennetts, R.G. ; Beenker, F.P.M.
Author_Institution :
Bennetts Associates, Southampton, UK
Abstract :
There has been considerable market activity about partial scan as a natural extension of full scan techniques. The authors present arguments for and against the partial scan. They argue that partial scan has little to offer compared to the two alternatives: no scan or full scan. For partial scan to replace full scan, it should combine the advantages of both no scan and full scan. It is suggested that with the one exception of critical timing, this is not the case
Keywords :
VLSI; boundary scan testing; design for testability; integrated circuit testing; integrated logic circuits; logic testing; IC testing; VLSI; critical timing; logic testing; partial scan; sequential circuits; Assembly; Design engineering; Design for testability; Filtering; Filters; Hardware; Manufacturing processes; Phase shift keying; Testing; Very large scale integration;
Conference_Titel :
European Test Conference, 1993. Proceedings of ETC 93., Third
Conference_Location :
Rotterdam
Print_ISBN :
0-8186-3360-3
DOI :
10.1109/ETC.1993.246528
