Low voltage hot carrier effects and stress methodology

The conventional methodology to predict hot carrier device lifetime is to apply stress at high voltages and then extrapolate to lower operating voltage. In this paper hot carrier stress has been applied with different voltages both above and below the silicon to oxide hot electron barrier of 3 V. The results indicate that there is no discontinuity on either side of the barrier in the lifetime versus stress substrate current curve. This means that the methodology used for the high voltage stress can be applied to low voltage stress. This is because the hot electron distribution has a high energy tail. The characteristics of this tail does not change for all practical voltages above or below the barrier