DocumentCode
3378313
Title
Essential testability guidelines for current technology
Author
Phillips, Jeffery C.
Author_Institution
Hewlett-Packard Co., Burlington, MA, USA
fYear
1993
fDate
19-22 Apr 1993
Firstpage
273
Lastpage
282
Abstract
This paper addresses the testability considerations, both electrical and mechanical, and focuses on requirements of technologies in the 1990s. It provides practical insight into how printed circuit board should be designed to make them testable. Developing discipline in design-for-test practices will inherently provide major savings in time and money in the test development process, reducing overall product cost
Keywords
automatic testing; boundary scan testing; design for testability; printed circuit testing; production testing; ATE; PCB; boundary-scan testing; controllability; design-for-test; electrical testability; fault coverage; mechanical testing; printed circuit board; product cost; testability guidelines; yield; Circuit testing; Connectors; Costs; Fixtures; Guidelines; Manufacturing; Pins; Printed circuits; Probes; Surface-mount technology;
fLanguage
English
Publisher
ieee
Conference_Titel
European Test Conference, 1993. Proceedings of ETC 93., Third
Conference_Location
Rotterdam
Print_ISBN
0-8186-3360-3
Type
conf
DOI
10.1109/ETC.1993.246563
Filename
246563
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