Checking signatures on boundary scan boards

The authors analyse off-chip and on-chip signature checking schemes suitable for boundary scan (BS) testing. The aim is to improve the on-board checking of chip build-in self-tests (BIST). It is shown that an efficient off-chip approach can reduce the memory requirements to store chip signatures into a test controller. However, only a built-in signature checking scheme (BISC) can further improve the required memory and the signature scanning time for locating faulty circuits on a board. Based on previous works and on existing self-checking approaches, the properties required for a BISC of general application are determined. It is shown that the association of self-testing BISC with an appropriate checking of signature registers makes less costly the integration of maximal diagnosis into a BS test controller chip