An integrated patch-clamp system with dual Input

Author

Weerakoon, Pujitha ; Sigworth, Fred ; Kindlmann, Peter ; Santos-Sacchi, Joseph ; Yang, Youshan ; Culurciello, Eugenio

Author_Institution

Yale Univ., New Haven, CT, USA

fYear

2010

fDate

May 30 2010-June 2 2010

Firstpage

1523

Lastpage

1526

Abstract

We present the first, fully integrated, multi-channel implementation of a patch-clamp measurement system. The system was implemented in a 0.5 μm silicon-on-sapphire process. The system can record two simultaneous cell membrane currents up to ±20 μA with a rms noise of 8 pA in a 10 kHz bandwidth. The system can compensate for the capacitance and resistance of the pipette electrode, up to 10 pF and 100 MΩ respectively. The system die size is 3 × 3 mm and the power consumption is 5 mW per channel at 3.3 V.

Keywords

electrodes; operational amplifiers; sapphire; silicon-on-insulator; RMS noise; Si-Al₂O₃; bandwidth 10 kHz; capacitance compensation; current 8 pA; integrated patch-clamp system; operational amplifier design; patch-clamp measurement system; pipette electrode; power 5 mW; power consumption; resistance compensation; silicon-on-sapphire process; simultaneous cell membrane currents; size 0.5 mum; voltage 3.3 V; Biomembranes; Cells (biology); Circuits; Clamps; Current measurement; Electrical resistance measurement; Electrodes; Parasitic capacitance; Radiofrequency amplifiers; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems (ISCAS), Proceedings of 2010 IEEE International Symposium on

Conference_Location

Paris

Print_ISBN

978-1-4244-5308-5

Electronic_ISBN

978-1-4244-5309-2

Type

conf

DOI

10.1109/ISCAS.2010.5537382

Filename

5537382