Title :
FNSIM: a functional fault simulator for efficient testability analysis
Author_Institution :
Swiss Federal Inst. of Technol., Lausanne, Switzerland
Abstract :
The problems of designing a versatile fault simulator for circuits lacking low-level structural details (no gate-level or transistor-level description) are addressed. Techniques of functional fault-modelling for test generation have been adapted to fault simulation. Methods for efficient handling of undetermined states are considered. A C++ implementation has been produced
Keywords :
automatic testing; digital simulation; electronic engineering computing; fault location; logic testing; C++ implementation; behavioural primitive functions; functional fault simulator; test generation; testability analysis; Analytical models; Automatic testing; Circuit faults; Circuit simulation; Circuit testing; Computational modeling; Laboratories; Logic arrays; Performance evaluation; Tail;
Conference_Titel :
European Test Conference, 1993. Proceedings of ETC 93., Third
Conference_Location :
Rotterdam
Print_ISBN :
0-8186-3360-3
DOI :
10.1109/ETC.1993.246614
