Title :
Effects of scaling on muon-induced soft errors
Author :
Sierawski, Brian D. ; Reed, Robert A. ; Mendenhall, Marcus H. ; Weller, Robert A. ; Schrimpf, Ronald D. ; Wen, Shi-Jie ; Wong, Richard ; Tam, Nelson ; Baumann, Robert C.
Author_Institution :
Inst. for Space & Defense Electron., Vanderbilt Univ., Nashville, TN, USA
Abstract :
Experimental results are presented that indicate technology scaling increases the sensitivity of microelectronics to soft errors from low-energy muons. Results are presented for 65, 55, 45, and 40 nm bulk CMOS SRAM test arrays. Simulations suggest an increasing role of muons in the soft error rate for smaller technologies.
Keywords :
CMOS memory circuits; SRAM chips; muons; radiation hardening (electronics); bulk CMOS SRAM test array; low energy muons; microelectronics; muon induced soft errors; size 40 nm; size 45 nm; size 55 nm; size 65 nm; technology scaling; Error analysis; Integrated circuit modeling; Kinetic energy; Mesons; Neutrons; Random access memory; Sea measurements;
Conference_Titel :
Reliability Physics Symposium (IRPS), 2011 IEEE International
Conference_Location :
Monterey, CA
Print_ISBN :
978-1-4244-9113-1
Electronic_ISBN :
1541-7026
DOI :
10.1109/IRPS.2011.5784484
