Characterization of steady and transient heating of interconnects - a review

Continued scaling of transistors and metal interconnects have resulted in high current densities and significant Joule heating in the metal lines, exacerbating thermally driven reliability issues in microprocessors. It is imperative, therefore, to develop an accurate and rapid predictive thermal characterization capability for on chip interconnect arrays to facilitate chip design. This is a multi-scale problem for which the traditional finite difference and finite element methods are generally inefficient due to their large computational times. Also, the thermophysical properties needed as inputs to the models are size dependent at the scale of interest. In this paper, we provide a review of some of the techniques developed recently for steady state and transient thermal characterization.