A VLSI - ASIC implementation of Fast Hartley transform for OFDM receivers

High performance and high speed algorithms are necessary for modulation and demodulation in OFDM receivers and transmitters respectively. Area, power dissipation and speed are the most important factors when it comes to implementation of such systems in VLSI domain. This paper proposes an ASIC implementation of Fast Hartley Transform instead of Fast Fourier Transform which is commonly used in OFDM receivers for demodulation. The proposed ASIC implementation of Fast Hartley Transform is done in TSMC 180 nm technology using Cadence NCSim and RTL compiler. Analysis report exhibits a considerable reduction of area by 62%, power dissipation by 16% and increase in speed by 39% compared to FFT.