A low-power low-noise amplifier for EEG/ECG signal recording applications

Author

Jinghao Feng ; Yan, Na ; Min, Hao

Author_Institution

ASIC & Syst. State Key Lab., Fudan Univ., Shanghai, China

fYear

2011

fDate

25-28 Oct. 2011

Firstpage

145

Lastpage

148

Abstract

This paper presents a low-power low-noise amplifier for electroencephalogram (EEG)/electrocardiogram (ECG) signal recording applications. The presented circuit contains a chopper-stabilized amplifier and a second-order continuous time Gm-C low pass filter (LPF) using very small Gm OTA. The circuit totally consumes 6.37μW with a single supply voltage of 1.2V. It achieves an AC gain of 40dB in mid-band, the input-referred integrated noise of 1.08μV_rms (0.1Hz-150Hz) and a high common-mode rejection ratio (CMRR) of 130dB in bandwidth. This circuit is implemented in SMIC 0.13μm 1P8M CMOS process.

Keywords

CMOS integrated circuits; choppers (circuits); continuous time filters; electrocardiography; electroencephalography; low noise amplifiers; low-pass filters; low-power electronics; operational amplifiers; EEG/ECG signal recording; Gm OTA; Gm-C low pass filter; SMIC 1P8M CMOS proces; chopper-stabilized amplifier; common-mode rejection ratio; electrocardiogram; electroencephalogram; gain 40 dB; low-power low-noise amplifier; power 6.37 muW; second-order continuous time filter; size 0.13 mum; voltage 1.2 V; Clocks; Electrocardiography; Electroencephalography; MOS devices; Modulation; Switches;

fLanguage

English

Publisher

ieee

Conference_Titel

ASIC (ASICON), 2011 IEEE 9th International Conference on

Conference_Location

Xiamen

ISSN

2162-7541

Print_ISBN

978-1-61284-192-2

Electronic_ISBN

2162-7541

Type

conf

DOI

10.1109/ASICON.2011.6157143

Filename

6157143