DocumentCode
3382853
Title
Minimizing the Lengths of Test Sequences with Overlapping
Author
Zhang, Fan ; Probert, Robert L.
Author_Institution
Sch. of Inf. Technol. & Eng., Ottawa Univ., Ont.
Volume
3
fYear
2005
fDate
16-19 May 2005
Firstpage
2355
Lastpage
2359
Abstract
In finite-state machine (FSM) based testing, it is highly desirable to minimize the test sequence length while achieving a certain level of fault coverage. This article, assuming the presence of a unique input/output (UIO) sequence for each state, proposes a novel mathematical model to construct a minimum-length test sequence that makes use of overlapping. It also describes algorithms for generating such test sequences, especially, efficient algorithms for FSM with special features. Examples are provided to illustrate the model and results
Keywords
fault diagnosis; finite state machines; logic testing; FSM; UIO sequence; fault coverage; finite-state machine; minimum-length test sequence; overlapping; test sequence length; unique input/output sequence; Testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Instrumentation and Measurement Technology Conference, 2005. IMTC 2005. Proceedings of the IEEE
Conference_Location
Ottawa, Ont.
Print_ISBN
0-7803-8879-8
Type
conf
DOI
10.1109/IMTC.2005.1604599
Filename
1604599
Link To Document