• DocumentCode
    33855
  • Title

    Expedited-compact architecture for average scan power reduction

  • Author

    Saeed, Samah Mohamed Ahmed ; Sinanoglu, Ozgur

  • Volume
    30
  • Issue
    3
  • fYear
    2013
  • fDate
    Jun-13
  • Firstpage
    25
  • Lastpage
    33
  • Abstract
    In expedited-compact scan, the output response of the STUMPS channels is smartly compacted without the overhead of the full-scan chain-shift operation, thereby reducing the scan mode power. The authors propose suitable integration with other scan compression methods.
  • Keywords
    design for testability; integrated circuit testing; DB+EC architecture; STUMPS channel; average scan power reduction; design-for-testability; expedited-compact architecture; expedited-compact scan; output response; Compaction; Computer architecture; Microprocessors; Multiplexing; Power dissipation; Switches; Testing; Test power; response compaction; scan power; shift power; test compression;
  • fLanguage
    English
  • Journal_Title
    Design & Test, IEEE
  • Publisher
    ieee
  • ISSN
    2168-2356
  • Type

    jour

  • DOI
    10.1109/MDT.2012.2213793
  • Filename
    6272429
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=33855