DocumentCode
3385946
Title
Analysis of Bang-bang CDR circuits with equations of linear motion
Author
Joshi, Archit
Author_Institution
STMicroelectronics, Noida
fYear
2008
fDate
Aug. 31 2008-Sept. 3 2008
Firstpage
1143
Lastpage
1146
Abstract
This paper presents the timing analysis of a phase locked loop based clock and data recovery (CDR) circuit with Bang-bang phase detector using equations of linear motion. The stability conditions are derived in near lock and in locked states. Effect of mismatch in pull-up and pull-down currents is also analyzed during phase locking.
Keywords
clock and data recovery circuits; mathematical analysis; phase detectors; phase locked loops; timing circuits; bang-bang phase detector; clock and data recovery circuit; linear motion equations; phase locked loop; timing analysis; Circuits; Clocks; Detectors; Equations; Frequency; Motion analysis; Phase detection; Signal generators; Virtual colonoscopy; Voltage-controlled oscillators;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronics, Circuits and Systems, 2008. ICECS 2008. 15th IEEE International Conference on
Conference_Location
St. Julien´s
Print_ISBN
978-1-4244-2181-7
Electronic_ISBN
978-1-4244-2182-4
Type
conf
DOI
10.1109/ICECS.2008.4675060
Filename
4675060
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