Multi-objective optimization for Networks-on-Chip architectures using Genetic Algorithms

Networks-on-Chip (NoC) architecture design faces a trade-off between different conflicting metrics. In this paper, we target one aspect of this trade-off: area versus average delay. The NoC architecture generation is formulated as a two-objective optimization problem and a Genetic Algorithm (GA)-based technique is used to solve it. According to the application requirements and the design constraints, the optimization process could be controlled by the designer by specifying weight factors for area and delay. As a proof of concept, our technique is applied to three real applications with different number of cores. Results show that the proposed solution is a promising way to achieve the best architecture with respect to both area and delay.