DocumentCode
3387241
Title
Chip level security: Why ? How ?
Author
Leveugle, R.
Author_Institution
TIMA Lab., Grenoble
fYear
2008
fDate
Aug. 31 2008-Sept. 3 2008
Firstpage
25
Lastpage
26
Abstract
This tutorial discusses the specific design constraints related to secure integrated systems, or at least the most critical elements in such systems, e.g. crypto-processors. After a presentation of the general context, the basics of circuit-level attacks are summarized. Circuit level and architecture level methods for the design and implementation of robust secure circuits are explained. Characteristics and limitations of the main hardware protection schemes (also called counter-measures) are discussed. Experimental attack data are shown on several implementation technologies (ASIC and FPGA).
Keywords
application specific integrated circuits; cryptography; field programmable gate arrays; integrated circuit reliability; ASIC; FPGA; architecture level; chip level security; circuit-level attacks; counter-measures; crypto-processors; robust secure circuits;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronics, Circuits and Systems, 2008. ICECS 2008. 15th IEEE International Conference on
Conference_Location
St. Julien´s
Print_ISBN
978-1-4244-2181-7
Type
conf
DOI
10.1109/ICECS.2008.4675132
Filename
4675132
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