DocumentCode :
3388379
Title :
A digital background correction technique combined with DWA for DAC mismatch errors in multibit ΣΔ ADCs
Author :
Pakniat, Hossein ; Yavari, Mohammad ; Lotfi, Reza
Author_Institution :
Dept. of Electr. Eng., Amirkabir Univ. of Technol., Tehran, Iran
fYear :
2010
fDate :
May 30 2010-June 2 2010
Firstpage :
293
Lastpage :
296
Abstract :
A digital background correction technique combined with data weighted averaging (DWA) algorithm is presented to overcome the digital-to-analog converters (DACs) unit element mismatch errors in multibit sigma-delta modulators (ΣΔMs). This technique needs a background measurement process. The circuit-level simulation results confirm the validity of the measurement process and the system-level simulation results are provided to verify the usefulness of this correction technique in low oversampling ratios (OSRs). This method enhances the peak signal-to-noise and distortion ratio (SNDR) about 11.5 dB with respect to the DWA algorithm when the OSR is 8.
Keywords :
circuit simulation; digital-analogue conversion; sigma-delta modulation; DAC mismatch errors; DWA; circuit-level simulation; data weighted averaging; digital background correction technique; digital-to-analog converters; multibit ΣΔ ADC; multibit sigma-delta modulators; oversampling ratios; signal-to-noise and distortion ratio; Circuit simulation; Delta-sigma modulation; Digital modulation; Distortion measurement; Error correction; Feedback; Frequency; Quantization; Transfer functions; Wideband;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems (ISCAS), Proceedings of 2010 IEEE International Symposium on
Conference_Location :
Paris
Print_ISBN :
978-1-4244-5308-5
Electronic_ISBN :
978-1-4244-5309-2
Type :
conf
DOI :
10.1109/ISCAS.2010.5537857
Filename :
5537857
Link To Document :
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