Title :
Register relocation to optimize clock network for multi-domain clock skew scheduling
Author :
Yang, Liang ; Fan, Baoxia ; Cong, Ming ; Zhao, Jiye
Author_Institution :
Grad. Univ. of Chinese Acad. of Sci., Beijing, China
fDate :
May 30 2010-June 2 2010
Abstract :
Multi-domain clock skew scheduling provides performance improvement for circuits in an efficient way. However, the cost of clock network construction could be further reduced when clock scheduling scheme is considered during placement. Here we focus on this and propose an incremental register relocation algorithm to minimize the distance to the nearby ones in the same skew domain, while registers are relocated within their permissible displacement range so as not to violate timing constraints. The experiments showed our method achieved a significant cost reduction in clock networks, which did NOT rely on any specified clock structures and was applicable to general clock constructions.
Keywords :
logic circuits; logic design; clock network; incremental register relocation algorithm; multidomain clock skew scheduling; Circuits; Clocks; Clustering algorithms; Computers; Costs; Processor scheduling; Propagation delay; Registers; Scheduling algorithm; Timing;
Conference_Titel :
Circuits and Systems (ISCAS), Proceedings of 2010 IEEE International Symposium on
Conference_Location :
Paris
Print_ISBN :
978-1-4244-5308-5
Electronic_ISBN :
978-1-4244-5309-2
DOI :
10.1109/ISCAS.2010.5537941