DocumentCode
3390352
Title
Genetic algorithm based topology generation for application specific Network-on-Chip
Author
Choudhary, Naveen ; Gaur, M.S. ; Laxmi, V. ; Singh, V.
Author_Institution
Dept. of Comput. Eng., Malaviya Nat. Inst. of Technol., Jaipur, India
fYear
2010
fDate
May 30 2010-June 2 2010
Firstpage
3156
Lastpage
3159
Abstract
Network-on-Chip (NoC) has been proposed as a solution for the communication challenges of System-on-chip (SoC) design in nanoscale technologies. Application specific SoC design offers the opportunity for incorporating custom NoC architectures that are more suitable for a particular application, and do not necessarily conform to regular topologies. The aim is to generate a custom NoC that maximizes performance under the given resource constraints. The paper presents a heuristic technique based on genetic algorithm for synthesis of custom NoC architectures along with requisite routing tables with the objective to improve communication load distributions in the network subject to the resource constraints in such a way that the overall communication throughput and latency improves.
Keywords
application specific integrated circuits; genetic algorithms; network topology; network-on-chip; application specific network-on-chip; communication load distributions; genetic algorithm; routing tables; system-on-chip design; topology generation; Application software; Bandwidth; Character generation; Computer networks; Genetic algorithms; Genetic engineering; Network topology; Network-on-a-chip; Routing; System recovery;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems (ISCAS), Proceedings of 2010 IEEE International Symposium on
Conference_Location
Paris
Print_ISBN
978-1-4244-5308-5
Electronic_ISBN
978-1-4244-5309-2
Type
conf
DOI
10.1109/ISCAS.2010.5537952
Filename
5537952
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