Rapid design space exploration for multi parametric optimization of VLSI designs

Design Space Exploration (DSE) is one of the most important stages in High Level Synthesis designing methodology. This paper presents a novel DSE approach for the current generation of systems with heterogeneous multi parametric optimization objectives. The method introduced in this paper is capable of concurrently resolving multiple conflicting issues encountered during DSE, such as maximization of accuracy needed in the evaluation of design space with minimization in time expended to explore the best architecture. Results of the proposed method for different benchmarks indicated significant acceleration in exploration process compared to another existing approach that is also based on Pareto optimal analysis.