Title :
Design and implementation of multiple addresses parallel transmission architecture for storage area network
Author :
Meng, Bin ; Khoo, Patrick B T ; Chong, T.C.
Author_Institution :
Data Storage Inst., Nat. Univ. of Singapore, Singapore
Abstract :
In this paper we present a parallel transmission architecture for the storage area network (SAN). By using two schedulers on the destination and source addresses of packets, the load of multiple data flows between multiple devices can be balanced in an asymmetrical topology without using special hardware. The SAN performance could be scaled flexibly and an additional fault tolerance feature is provided. The load balancing algorithms we provide can be easily implemented and the computation is efficient enough for high-speed transmission.
Keywords :
fault tolerance; local area networks; network topology; packet switching; parallel architectures; resource allocation; SAN; asymmetrical topology; fault tolerance; load balancing algorithms; multiple data flows; parallel transmission architecture; schedulers; storage area networks; Availability; Bandwidth; Fault tolerance; Hardware; Load management; Network topology; Packet switching; Protocols; Scheduling; Storage area networks;
Conference_Titel :
Mass Storage Systems and Technologies, 2003. (MSST 2003). Proceedings. 20th IEEE/11th NASA Goddard Conference on
Print_ISBN :
0-7695-1914-8
DOI :
10.1109/MASS.2003.1194838
